METHOD OF CONVERTING STRUCTURE OF ARGUMENTS OF ANALOGUE LOGIC VOLTAGES «-/+»[m]f(+/-) - "COMPLEMENTARY CODE" TO POSITION-SIGN STRUCTURE OF MINIMISED ARGUMENTS OF LOGIC VOLTAGES [m]f(+/-) AND FUNCTIONAL STRUCTURE FOR REALISATION THEREOF (VERSIONS OF RUSSIAN LOGIC) Russian patent published in 2013 - IPC H03M7/04

Abstract RU 2502184 C1

FIELD: information technology.

SUBSTANCE: inventions can be used in designing arithmetic units and performing arithmetic procedures over input conditionally negative arguments of analogue signals and conversion thereof to a position-sign structure of arguments "complementary code" using the arithmetic axioms of a ternary number system for subsequent summation with other arguments of analogue signals of terms in a position format. In one version, the converter is realised using logic elements AND, OR.

EFFECT: wider dynamic range of converting arguments and faster operation when performing arithmetic conversions in a position-sign adder and multiplier.

7 cl

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RU 2 502 184 C1

Authors

Petrenko Lev Petrovich

Dates

2013-12-20—Published

2012-05-21—Filed