FIELD: physics.
SUBSTANCE: device further includes an OR logic element and a signature coefficient memory unit, address inputs of which are connected to outputs a shift register unit. All inputs of the shift registers are connected to outputs of the shift register unit, and the reset inputs of all shift registers are integrated and connected to the reset input of the shift register unit; outputs of the signature coefficient memory unit are connected to outputs of the device and to inputs of the OR logic element, the output of which is connected to the second control input of a control unit, the fifth and sixth outputs of which are respectively connected to the control input for accessing the signature coefficient memory unit and to the reset inputs of the shift register unit and a most significant bit address counter.
EFFECT: high efficiency of image recognition.
9 dwg
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Authors
Dates
2015-02-10—Published
2013-08-20—Filed