PROCESSOR MADE WITH POSSIBILITY OF TRANSACTIONS AND REGISTRATION SCHEME FOR REPORT ON TRANSACTION OPERATIONS Russian patent published in 2017 - IPC G06F15/76 

FIELD: information technology.

SUBSTANCE: processor comprises: a memory access conflict detection circuit for identifying a conflict relating to a transaction runned in the stream; a registration scheme to form and output a data packet as a report, during identification mentioned by the memory access conflict detection circuit, on a conflict that causes interruption of the said transaction, wherein the data packet contains contents describing the reason for the said transaction interruption, and the data packet structure comprises a field to indicate one of the: transaction start, transaction end and the said interruption, and wherein the said content is outputed as a report to the said register circuit in response to the interruption.

EFFECT: perfomance of operations with memory in transactions mode with definition of conditions of transactions abort.

15 cl, 8 dwg