PARALLEL COMPUTING ARCHITECTURE Russian patent published in 2018 - IPC G06F15/00 

FIELD: radio engineering, communication.

SUBSTANCE: parallel computing architecture (CS) containing N functional modules (FM) having two information inputs, two inputs of readiness features, an information output and an output of the readiness sign of the result and consisting of control devices and operational devices implementing double and single operations. The number of N FM is even; in the structure of the CS there are: a local bus, a system controller, a service memory, a data memory with an extended interface, an adapter and two command memory devices with an extended interface available from the side of the system controller and N/2 FM each one; in the structure of the FM there are: a switchboard of the first operand, a switchboard of second operand, an output of a switchboard, registers of the first and second operands, and a result register of the operation; the FM control device contains a command register, a stream unit and an execution control unit; the FM interface is represented by four information-control inputs, an information input-output, an information-control output, a control input-output and a command input-output.

EFFECT: increase in productivity.

10 dwg, 7 tbl