FIELD: computer equipment.
SUBSTANCE: invention relates to computer equipment. Device comprises: a clock pulse generator, first element, first counter, decoder, group of m first registers 81…8m, group of m second counters 131…13m, first comparison circuit, first delay element, second delay element, output of clock pulse generator 1 is connected to first input of first AND 2 element, output of which is connected to the input of the first delay element, matrix m*n of the first flip-flops 511…5mn, matrix m*n of the second elements AND 611…6mn, m totalizers 71…7m, m first registers 81…8m, block for selecting the maximum code, m of the third elements AND 101…10m, m second triggers 111…11m, m of the fourth elements AND 121…12m, third trigger, second register, second comparison circuit, third counter, fifth AND gate 19, third delay element.
EFFECT: technical result consists in improvement of data processing speed.
1 cl, 1 dwg
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Authors
Dates
2018-10-08—Published
2017-10-30—Filed