FIELD: computer equipment.
SUBSTANCE: invention relates to computer engineering and can be used as a logic element in electrical circuits of arithmetic logic devices and electronic computers, and specifically performs summation and subtraction of two natural numbers to obtain a result in the form of an integer non-negative number. Adder comprises ring of semiconducting material, having toothed outer and inner perimeters, in teeth of which there are input electrodes, and also is equipped with output electrodes fixed between two perimeters.
EFFECT: high-speed addition or subtraction of natural numbers N and M without intermediate conversion thereof into a binary code, as well as complete elimination of a chance error during calculation.
1 cl, 4 dwg
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