FIELD: electronics.
SUBSTANCE: invention relates to the design of printed circuit boards, specifically to the methods for PC board tracing. The expected result is achieved by the fact that in the tracing method for a double-sided printed circuit board that protects against USP, including the layout and tracing of the redundant and backup circuits, the layout and tracing of the redundant circuit are performed on the upper layer of the substrate, and the layout and tracing of the backup circuit are performed on the lower layer of the substrate mirror the upper layer, so that the redundant and backup conductors are located under each other. On the upper layer of the substrate, the reference conductor is performed to the left of the redundant conductor, and on the lower layer of the substrate, the reference conductors are performed to the left and right of the backup conductor. At the same time, the value of the line length multiplied by the value of the difference between the maximum linear delay and the largest of the remaining linear delays of the four pulses of the expansion of the ultrashort pulse is no less than the sum of the durations of the front, flat top and descent of the USP, fed between the conductor of the redundant circuit on the upper layer of the substrate and any reference conductor.
EFFECT: reduction in the mass of the printed circuit board, without reducing the suppression of ultrashort pulses (USP).
1 cl, 4 dwg
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Authors
Dates
2021-12-20—Published
2021-03-04—Filed