FIELD: computer technology.
SUBSTANCE: invention can be used in digital computing devices for generating code sequences, as well as in digital signal processing devices and in cryptographic applications. The device contains (n−1) blocks for the formation of partial remainder and (n−1) parallel registers, where n is the capacity of the input numbers, and the block for the formation of partial remainder contains an adder and a multiplexer with appropriate connections.
EFFECT: reduction of the amount of equipment used, as well as the expansion of functionality due to the additional formation of an incomplete quotient.
1 cl, 3 dwg
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