FIELD: computer engineering.
SUBSTANCE: device comprises input and output ports, a PCI-Express interface switch, reference frequency generators of computational PLDs and co-computers, a unit for generating synchronization of co-computers, unit for configuring computational PLD, system PLD, memory of initial configuration of system PLD and basic configuration of computing PLD, ports for control and management of JTAG, monitoring and control, control of cooling and power supply, group of M computational PLDs with individual power supply, each of which comprises, combined into a static region, an auto-configuration unit, a PCI-Express controller, a switch configuration memory, an auto-lock control unit, static region switch, co-calculator adapter, synchronization generating unit, and, combined into a dynamic region, a group of N virtual regions, each of which consists of K actuators, K adapters and a switch, and a group of M co-computers with individual power supply, each of which comprises an interface unit, a co-computer switch and a group of L computing cores.
EFFECT: high efficiency of the device.
1 cl, 1 dwg
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Authors
Dates
2024-07-18—Published
2023-11-14—Filed