FIELD: computer engineering.
SUBSTANCE: device comprises switches, adders, three-input adders, which contain single-bit full adders and (m+1)-bit adder, and five-input multiplexers; wherein when calculating the product of numbers modulo P by successively performing (n/2) operations, where n is the number of bits of the input number A, reduction of calculation results by an arbitrary modulus at each conversion stage is performed in one step, simultaneously with the operation of summation of intermediate calculations.
EFFECT: faster operation of the device.
1 cl, 2 dwg
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