FIELD: computer engineering. SUBSTANCE: device has residue computation unit 1, n arithmetic units 2.1-2. n, coefficient storage unit 5, result recovery unit 6, multiplexer 4. Additional arithmetic unit 2 and corresponding functional connections are introduced to accomplish the goal of invention. Single processor with rounding channel is used for implementation of algorithm for computing convolution together with procedure for rounding. EFFECT: simplified design. 3 dwg
Title | Year | Author | Number |
---|---|---|---|
DEVICE FOR CHECKING AND CORRECTING ERRORS IN REDUNDANCY MODULAR CODE | 1991 |
|
RU2015620C1 |
DEVICE FOR CHECKING AND ERROR CORRECTION IN REDUNDANT MODULAR CODE | 1991 |
|
RU2022472C1 |
ERROR CORRECTION DISCRETE FOURIER TRANSFORM SYSTOLIC PROCESSOR | 1992 |
|
RU2018950C1 |
DEVICE FOR CONVERSION OF NUMBER TO QUADRATIC RESIDUES | 1992 |
|
RU2029436C1 |
DEVICE FORE CONVOLUTION CALCULATING | 0 |
|
SU1654835A1 |
SYSTOLIC FAILURE-PROOF PROCESSOR OF DISCRETE FOURIER TRANSFORM | 1992 |
|
RU2029437C1 |
CONVEYOR NEURON NETWORK OF FINITE RING | 2006 |
|
RU2317584C1 |
DEVICE FOR CONVERSION OF NUMBERS FROM CODE OF RESIDUAL CLASS INTO POSITION CODE WITH CHECK OF ERRORS | 0 |
|
SU1797119A1 |
NEURON NETWORK OF FINITE RING | 2003 |
|
RU2279132C2 |
NEURON NETWORK FOR FINDING, LOCALIZING AND CORRECTING ERRORS IN RESIDUAL CLASSES SYSTEM | 2005 |
|
RU2301442C2 |
Authors
Dates
1994-04-30—Published
1991-07-08—Filed