FIELD: computer engineering. SUBSTANCE: device has input registers 1,2, adders 5,6,10 on modulus 2n+1, multiplier 9 on modulus 2n+1, subtracter 11 on modulus 2n+1, converters 3,4 of direct code to additional one, and registers 7,8 storing intermediate result. EFFECT: higher speed of operation. 1 dwg
Title | Year | Author | Number |
---|---|---|---|
DEVICE FOR CONVERSION OF NUMBER TO QUADRATIC RESIDUES | 1992 |
|
RU2029436C1 |
ERROR CORRECTION DISCRETE FOURIER TRANSFORM SYSTOLIC PROCESSOR | 1992 |
|
RU2018950C1 |
DEVICE FOR CHECKING AND CORRECTING ERRORS IN REDUNDANCY MODULAR CODE | 1991 |
|
RU2015620C1 |
DEVICE FOR CHECKING AND ERROR CORRECTION IN REDUNDANT MODULAR CODE | 1991 |
|
RU2022472C1 |
DEVICE FOR CALCULATING ABSOLUTE VALUES OF SQUARE REMAINDERS | 1991 |
|
RU2020757C1 |
SYSTOLIC FAILURE-PROOF PROCESSOR OF DISCRETE FOURIER TRANSFORM | 1992 |
|
RU2029437C1 |
DEVICE FOR COMPUTING OF MODULO @@@+1 REMINDER | 0 |
|
SU1734212A1 |
SYSTOLIC PROCESSOR FOR COMPUTING POLYNOMIAL FUNCTIONS | 1991 |
|
RU2015549C1 |
DEVICE FOR HANDLING INFORMATION REPRESENTED IN RESIDUAL CLASS SYSTEM | 0 |
|
SU1743002A1 |
CONVERTER FOR CONVERTING A CODE FROM THE RESIDUAL CLASS SYSTEM TO POSITION CODE | 0 |
|
SU1388996A1 |
Authors
Dates
1994-04-30—Published
1991-04-02—Filed