DEVICE FOR CONVOLUTION BY VARIABLE MODULO Russian patent published in 1995 - IPC

FIELD: computer engineering. SUBSTANCE: device has flip-flop 1, modulo-two adder 2, AND gates 3-6, 15, 17, 19, comparison gates 7, 8, 20 and 21, OR gates 9, 14, 16, 18 and 23, self-test register 10, integer register 11, paraphase decoder 12 and paraphase commutator 13. Device provides possibility to increase validity of operations, i.e. increased coefficient for fault search depth when device functionality is tested. This is achieved by device design using paraphase logic. According to paraphase logic, logical zero is encoded as <01>, logical one as <10>, states <00> and <11> are prohibited for operations. Device operates in two modes. The first mode is testing remainder of one from two selected modulo. The second mode is device self-test mode. Value of modulo is determined by signal which arrives at flip-flop 1. Number that is tested in remainder is sent to inputs of integer register 11. Set modulo remainder is output in paraphase code. EFFECT: increased validity. 2 cl, 18 dwg, 3 tbl