FIELD: computer engineering. SUBSTANCE: device has channels, channel priority register, channel OR gate unit, three channel AND gate units, channel OR gate, channel comparison circuit, channel NOT gate, channel address register, channel AND gate, channel counter, last channel delay element, first-channel AND gate unit, decoder, computer number registers, group of AND gate units, OR gate, OR gate unit, group of comparison circuits, group of OR gates, reception configuration registers, AND gate units, comparison circuits, delay elements, OR gates, delay element, AND gate units, OR gate unit. Units and gates forming priority unit afford storage of computer status codes in multicomputer system and reconfiguration of stand-by computers thrown on line in case of failure of main computers; units and gates forming failure analysis unit record configuration of computers receiving information from communication channels, provide for reconfiguration of receiving computers in case of their failure and for generation of control signals for priority units and signals for switching computers in multicomputer system and communication channels. EFFECT: enlarged functional capabilities due to formation of reception reconfiguration control signals. 2 dwg
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Authors
Dates
1994-10-30—Published
1991-06-03—Filed