DEVICE FOR MULTIPLICATION OF NUMBERS REPRESENTED IN POSITION CODE Russian patent published in 1996 - IPC

FIELD: computer engineering. SUBSTANCE: device multiplies numbers by means of addition of factor bits at combinatorial adder, which has m-1 stages. Said adder is designed on basis of double-input joined AND-OR gates. Number of double- input joined AND-OR gates equals to serial number of stage. In case of two-bit multiplier, said stages are connected in way that number of factor bits that are subjected to multiplication is increased by one starting from upper bits of first factor and lower bits of second factor. EFFECT: simplified design, increased speed. 1 dwg, 1 tbl