FIELD: computer engineering. SUBSTANCE: device has memory gates 1, which first to fifth inputs are labeled as 2-6 and which first to third outputs are labeled as 7-9. In addition device has address lines 10, first and second storing lines 11 and 12, first and second request lines 13 and 4, output lines for results of requests, output direct comparison line 16, output inverse comparison lines 17, logical units using XOR gates 18. Device may be used in devices for storing, searching and sorting data. It implements algorithm for search and sort which uses indication of bit structure by request of association matrix for each cycle. EFFECT: increased speed. 2 dwg
Title | Year | Author | Number |
---|---|---|---|
ASSOCIATIVE MEMORY DEVICE | 1993 |
|
RU2037892C1 |
ASSOCIATIVE STORAGE | 1992 |
|
RU2025796C1 |
0 |
|
SU1785039A1 | |
ASSOCIATIVE MEMORY | 0 |
|
SU1718274A1 |
ASSOCIATIVE MEMORY DEVICE | 0 |
|
SU1793475A1 |
ASSOCIATIVE MEMORY DEVICE | 0 |
|
SU1824650A1 |
ASSOCIATIVE MEMORY CELL | 0 |
|
SU1751817A1 |
ASSOCIATIVE STORAGE MATRIX | 1996 |
|
RU2107955C1 |
HIERARCHICAL SYSTEM OF ASSOCIATIVE STORAGE | 1992 |
|
RU2025795C1 |
ASSOCIATIVE STORAGE | 1991 |
|
RU2045787C1 |
Authors
Dates
1996-08-10—Published
1993-03-17—Filed