FIELD: computer engineering. SUBSTANCE: device has L D + R processing units (D is dimension of matrices, R is number of redundant units), L combinatorial adders, L-1 registers, L-1 groups of OR gates, L comparison units, L groups of AND gates, L-th group of OR gates, OR gate. Device operates on basis of parallel- sequential processing with hardware error checking, re-routing and replacement of fault processing units. EFFECT: increased reliability, increased functional capabilities due to possibility to solve tasks with different dimensions. 2 cl, 3 dwg, 2 tbl
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