FIELD: computer engineering. SUBSTANCE: device has L = I+R processing units 1, where I is convolution size, R is number of redundant processing units, L combinatorial adders 2, L-1 registers 3, L comparison units 4, L-1 groups of OR gates 5, L groups of AND gates 6, NOR gate 7. EFFECT: simplified design, increased reliability, increased functional capabilities. 2 cl, 2 tbl, 3 dwg
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