FIELD: computer engineering; digital processing of signals and data, solving problems of mathematical physics. SUBSTANCE: adding device that has delay unit 3, input commutator built up of exponent adder 6 and switch 7, exponent counter 8, mantissa adder 12, normalization delay elements 13, mantissa analysis unit 14, two normalization control flip-flops 18, AND-OR gate 21, is provided, in addition, with input unit 4 of AND-OR gates, mantissa switch 5, control register 9, third delay element of normalization unit 13, unit 20 of normalization AND gates, result unit 23. EFFECT: improved computing accuracy in case of nonnormalized numbers as high as n/2+2, where n is word length of operands. 3 cl, 6 dwg, 1 tbl
Title | Year | Author | Number |
---|---|---|---|
DEVICE FOR MULTIPLICATION | 1998 |
|
RU2148270C1 |
MICROPROCESSOR UNIT | 2001 |
|
RU2210808C2 |
DEVICE FOR SIMULATING NEURONS | 1991 |
|
RU2029368C1 |
DATA PROCESSOR | 0 |
|
SU1742813A1 |
MICROPROCESSOR | 0 |
|
SU1756897A1 |
UNIVERSAL ADDER | 0 |
|
SU1786484A1 |
NEURON SIMULATOR | 0 |
|
SU1709356A1 |
MULTI-PORT ADDER | 0 |
|
SU1679483A1 |
MICROPROGRAM CONTROL UNIT | 1991 |
|
RU2020559C1 |
MATRIX COMMUTATOR | 1994 |
|
RU2103729C1 |
Authors
Dates
1996-11-10—Published
1993-12-07—Filed