MATRIX COMMUTATOR Russian patent published in 1998 - IPC

FIELD: computer engineering, in particular, design of computer systems commutation networks. SUBSTANCE: device has M commutation channels each of which has four address registers, which outputs starting from fourth bit are connected to address inputs of corresponding multiplexers. Goal of invention is achieved by introduced OR gate and each commutation channel has unit for reserving information channels and four transceivers, which information inputs-output are corresponding information inputs-outputs of corresponding address registers, output of second bit of each address register is connected to corresponding input of first group of information inputs of unit for reserving information channels. Output of third bit of each address register is connected to corresponding input of second group of control inputs of unit for reserving information channels. First group of information inputs is connected to outputs of corresponding multiplexers. Second group of information inputs is connected to outputs of corresponding transceivers. Information outputs are connected to information inputs of corresponding transceivers. Failure signal output is connected to corresponding input of OR gate, which output serves as signal output commutator. Information inputs of address registers provide control input of commutator. Information inputs of multiplexer provide information input of commutator. EFFECT: channel reservation mode, detection of errors in channels, correction of single errors during majority operations. 2 cl, 2 dwg