FIELD: non-destructive flaw control. SUBSTANCE: device has two field- effect transistors VT1 and VT2, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, sixth resistor R6. One pole of power supply is connected to joint of first and second resistors R1 and R2, another pole of power supply is connected to connection of third and fourth resistors. In addition device has first and second transistors VT3 and VT4 which collectors are respectively connected to drains of transistors VT1 and VT2, emitters are connected to positive polarity power supply (+Un). Bases of said transistors are joined and are connected to drain of transistor VT1. In addition device has third and fourth transistors VT5 and VT6, which collectors are respectively connected to sources of transistors VT1 and VT2. Their bases are joined, emitter of transistor VT5 is connected to second terminal of resistor R4. In addition device has serial circuit of resistor R7, collector-emitter junction of fifth transistor VT7 and stabilizing diode VD1, which anode is connected to negative polarity power supply (-Un). Second terminal of resistor R7 is connected to common line of device. Base and collector of transistor VT7 are joined and connected to bases of transistors VT5 and VT6. In addition device has eighth resistor, which one terminal is connected to emitter of transistor VT6 and second terminal is connected to power supply - Un. In addition device has ninth transistor, which is connected between sources of transistors VT1 and VT2. In addition device has variable resistor R11, which extreme terminals are connected to resistors R2 and R3 and which middle terminal is connected to gate of transistor VT2. In addition device has amplifier DA1, which direct input is connected to second terminal of first resistor R1 and sign-inverting terminal is connected to collector of transistor VT4, terminals for positive and negative power supply are connected to corresponding terminals of power supply. In addition device has tenth resistor R10 which one terminal is connected to source of second field-effect transistor VT2 and second terminal is connected to output of amplifier DA1, which output serves as device output. In addition first terminals of resistors R5 and R6 are connected to common line of device, second terminals of resistors R5 and R6 are respectively connected to direct input of amplifier DA1 and source of transistor VT1. Transistors VT1 and VT2 which serve as sensitive electrodes of device are designed as field-effect transistor with insulated gates. EFFECT: increased precision, increased resolution, increased dynamic range. 2 cl, 1 dwg
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Authors
Dates
1997-07-10—Published
1993-07-23—Filed