DECODER Russian patent published in 1997 - IPC

FIELD: communication devices, in particular, systems for digital data transmission. SUBSTANCE: device provides decoding of three types of two-interval codes phase-manipulated (Manchester), two-pulse (phase-difference manipulated) and frequency-manipulated codes. Device has first and second D flip- flops, modulo two adder, NOT gate, first and second AND gates, delay gate, shift register, equal sign gate. Pulses of sequence which is generated at output of delay gate provide overlap of start and end of each clock pulse so that information is decoded using shift register and equal sign gate. Decoding algorithm is selected by means of modulo two adder and AND gate using control signal which are sent to device inputs. Decoded information and phase- locked clock frequency are output through first and second outputs of decoder. EFFECT: increased functional capabilities, use of single decoder instead of three ones, fast change of decoding algorithms for newly developed systems which are connected to operating ones and use said types of two-interval codes. 4 dwg, 1 tbl