FIELD: computer engineering. SUBSTANCE: device has decoder, bus multiplexer, binary counter, buffer memory unit for reference value, address multiplexer, starting register, data multiplexer, seven flip-flops, generator of short pulse, selector, control register, three comparison circuits, subtracting pulse counter, two generators of read signal, two generators of write address, buffer memory unit for current loop value, address register, eight AND gates, four OR gates, return register. EFFECT: increased functional capabilities. 1 dwg
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Authors
Dates
1997-12-20—Published
1996-03-28—Filed