DEVICE FOR OPTIMIZATION OF UNIVERSAL BUS ACCESS DURING DIRECT MEMORY ACCESS DATA TRANSMISSION Russian patent published in 1998 - IPC

Abstract RU 2110838 C1

FIELD: control of data transmission through universal bus between memory unit and peripheral devices and processors. SUBSTANCE: device has CPU 10, memory unit 11, at least two external communication channels 13, 14, which inputs-outputs are connected to system bus 12 which is connected to output of oscillator 15. Device provides possibility to resolve conflicts between devices using priorities due to elimination of waste conflict resolving cycles and large packet buffers. EFFECT: increased efficiency of conflict resolution, availability of data transmission through bus. 3 cl, 6 dwg

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RU 2 110 838 C1

Authors

Dzhordzh Bogoslov Marenin[Us]

Dates

1998-05-10Published

1991-09-20Filed