METHOD FOR REJECTION TESTS OF LAYOUT-BEARING INSULATION OR SEMICONDUCTOR SUBSTRATE AND ELECTRONIC DEVICES FOR EXTERNAL EFFECTS Russian patent published in 1999 - IPC

FIELD: DC and ac rejection tests of substrates of all kinds. SUBSTANCE: method involves measurement of electrophysical parameters of substrates under test with their circuit components connected as at least one two-terminal device during and/or after effect of external factors followed by comparing values obtained with similar parameters of standard and rejection of substrates not complying with specified data; two-terminal device is formed by separating two insulated power buses a on substrate, electrically combining remaining electric circuits into (n-2) buses, and interconnecting conglomerates of electric buses a, ,...(n-2) obtained. EFFECT: reduced labor consumption, improved reliability, and proximate evaluation of yield. 13 cl, 3 dwg