FIELD: radio receivers incorporating provision for power detection. SUBSTANCE: amplitudes of common-mode and quadrature sampled signals being received are determined. Values obtained are summed up and shared among accumulator registers meant for accumulating sums of first and second signals for each time period of retrieval and, in effect, over entire length of expected burst. Maximum-minimum determining circuit selects sampling time interval that has maximal or minimal sum to obtain signal of recovered clock synchronization. During next stage carrier frequency can be recovered, and sub-sampling device will additionally sample common-mode and quadrature signals being received on the basis of signal of recovered clock synchronization. EFFECT: improved accuracy of clock synchronization of characters form signal having wide range of errors and frequency drift. 10 cl, 3 dwg
Authors
Dates
2000-02-20—Published
1996-05-08—Filed