FLEXIBLE ASYNCHRONOUS ADDER-MULTIPLIER Russian patent published in 2000 - IPC

Abstract RU 2159464 C1

FIELD: computer engineering. SUBSTANCE: device may be used for calculations of fast Fourier transform and Winograd convolution. Goal of invention is achieved by introduced 2m bus multiplexers of additives, device control unit, factor bus multiplexer, which has m multiplexers n in 1, m-1 asynchronous addition units. Each asynchronous addition unit also has introduced first additive shifter- commutator, unit of first additive multiplexers. The latter unit has 2m multiplexers 3 in 1. In addition, asynchronous addition unit has unit of first additive multiplexers, which has 2m multiplexers 2 in 1, sum readiness multiplexer and inverter. EFFECT: increased functional capabilities. 4 dwg

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RU 2 159 464 C1

Authors

Dovgal' V.M.

Seleznev M.E.

Starkov F.A.

Titov V.S.

Dates

2000-11-20—Published

1999-05-05—Filed