FIELD: semiconductor integrated circuits activated in parallel or in series. SUBSTANCE: clock signal (CLint) output lead is coupled through respectively controlled change-over facility (MP1, MP2, MP3, MP4) with clock input of respective circuit units (S1. S2, S3, HS) and control inputs of change-over facilities (MP1, MP2, MP3, MP4) are coupled with output of random signal generator (ZSG) so that respective circuit unit (S1, S2, S3, HS) operates in parallel or in series with one or more other circuit units (S1, S2, S3, HS) in compliance with random signals. EFFECT: preventing type-of-process data acquisition by counting current peaks. 10 cl, 6 dwg
