FIELD: digital computer equipment engineering, automatics.
SUBSTANCE: each digit of counter contains only one RS-trigger, four elements AND, OR, NOT, eight control buses and informational bus. Impulse counting operation is performed during two clock cycles. On basis of first cycle, potential of transfer with maximal time is formed. On basis of second clock cycle, counting result is inputted into RS-triggers. Aside from counting impulses, device performs inversion of RS-triggers, subtraction of impulses, shifting of code to left or right, logical addition and multiplication. Particularity of counter is the fact that correct transfer is artificially supported due to injection of signal into transfer circuit, if trigger is set to "zero", and due to forbidden expansion of transfer signal in current bit, if trigger is set to "one". Total number of inputs of logical elements of one bit of counter is equal to 31 (Quine's cost), including 7 inputs for constructing the trigger.
EFFECT: increased speed of counting operation, expanded list of supported operations.
1 dwg
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---|---|---|---|
PULSE COUNTER | 2006 |
|
RU2308801C1 |
COUNTER-TYPE ADDER | 2005 |
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RU2288501C1 |
COINCIDENCE-ACCUMULATION TYPE ADDER | 2006 |
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ACCUMULATING-TYPE ADDER | 2004 |
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PULSE COUNTER | 2010 |
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RU2419200C1 |
COMBINATIVE ACCUMULATING ADDER | 2005 |
|
RU2292073C1 |
COMBINATION TYPE ADDER | 2004 |
|
RU2275676C1 |
IMPULSE COUNTER | 2005 |
|
RU2284654C2 |
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|
RU2308073C2 |
Authors
Dates
2006-09-27—Published
2004-11-25—Filed