FIELD: computer engineering, possible use during creation of active devices for local area networks.
SUBSTANCE: in accordance to invention, device includes address table, block for realization of hash function of first and second type, block for realization of orderly filling and binary search operations and control block. Address table is divided on two independent physical memory pages. Task queue is connected to block for realization of orderly filling and binary searching operations. Address table, blocks for realization of hash function of first and second types, task queue and block for realization of orderly filling and binary search operations are connected to control block.
EFFECT: possible usage of hash functions in conjunction with orderly filling and binary searching algorithms, increased speed of operation and increased reliability of commutator address processing.
1 dwg
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Authors
Dates
2007-08-20—Published
2005-12-23—Filed