ELECTRONIC LOCK CONTROLLER Russian patent published in 2009 - IPC E05B49/00 

FIELD: information and technology.

SUBSTANCE: invention refers to the sphere of objects and facilities unauthorised access protection techniques immediately dealing with electronic locks design. The electronic lock controller includes the following components: timer tick counter (1) (TTC), code match counter (2) (CMC), code mismatch counter (3) (CMMC), read-only memory (ROM) (4), multiplexer (5) (MX), RS-trigger (6), "EXCLUSIVE OR" element (7) (EO), the first, the second, the third, the fourth and the fifth AND-elements (8, 9, 10, 11&12), capacitance integrator (13), Schmitt trigger (14), data (15) and timer (16) buses, output bus (17). The complementing input of the timer tick counter (1) is connected to the timer bus (16) and to the first input of the fifth AND-element (12) with the timer tick counter (1) R-input connected to the Schmitt trigger (14) output, the R-inputs of the code match counter (2) and the RS-trigger (6) and the second input of the first AND-element (8). The timer tick counter (1) output is connected to the capacitance integrator (13) input and the first inputs of the second and the third AND-elements (9&10). The unit outputs of the timer tick counter (1) are connected to the corresponding address inputs of the read-only memory (ROM) (4). The complementing input of the code match counter (2) is connected to the output of the fifth AND-element (12). Output A of the code match counter (2) is connected to the inverting third input of the third AND-element (10), the third input of the second AND-element (9) and the second input of the fourth AND-element (11). Output B of the code match counter (2) is connected to the fourth input of the third AND-element (10), the latter's output connected to the complementing input of the code mismatch counter (3). The R-input of the code mismatch counter (3) is connected to the output of the first AND-element (8). The true output of the code mismatch counter (3) is connected to the control input of the multiplexer (5) and the first input of the "EXCLUSIVE OR" element, while the inverting output of the code mismatch counter (3) is connected to the second inputs of the third and the fourth AND-elements (9&10). The first and the second outputs of the read-only memory/ROM (4) are connected to the first and the second inputs of the multiplexer (5) accordingly, the latter's output connected to the second input of the "EXCLUSIVE OR" element (7) The output of the fourth AND-element (11) is connected to the output of the RS-trigger, the latter's output connected to the first input of the first AND-element (8). The data bus (15) is connected to the first input of the "EXCLUSIVE OR" element (7), the latter's inverting output connected to the second input of the fifth AND-element (12). The output of the second AND-element (9) is connected to the output bus (17). The capacitance integrator (13) output is connected to the Schmitt trigger (14) input.

EFFECT: lock enhanced security.

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