FIELD: information technology.
SUBSTANCE: read-only memory has memory blocks, initialisation bus, operation mode bus, address bus, recording bus, single error corrector and data bus, word bit packing control unit, blocks of AND elements, block of OR elements and word output unit. Separate address buses for the memory blocks and the word bit packing control unit are connected to each other, forming the common address bus of the device. Separate operation mode buses of the memory blocks are connected to each other, forming a common operation mode bus. Separate initilisation buses of memory blocks, the word bit packing control unit, the single error corrector and the word output unit are connected to each other, forming a common initialisation bus.
EFFECT: increased reliability of the device and broader functional capabilities.
2 dwg, 1 tbl
Title | Year | Author | Number |
---|---|---|---|
MEMORY DEVICE | 2008 |
|
RU2384899C2 |
MEMORY DEVICE WITH ERROR CORRECTION | 0 |
|
SU955207A1 |
MEMORY WITH GROUP ERROR CORRECTION | 0 |
|
SU1481863A1 |
STORAGE UNIT WITH CORRECTION OF ERRORS | 0 |
|
SU1336122A1 |
DATA STORAGE DEVICE WITH SINGLE ERROR CORRECTION AND DOUBLE ERROR DETECTION | 2024 |
|
RU2826822C1 |
STORAGE WITH SELF-CHECK | 0 |
|
SU1167659A1 |
SELF-CORRECTED DEVICE | 1999 |
|
RU2210805C2 |
MEMORY DEVICE WITH SELF-DIAGNOSIS | 0 |
|
SU1569905A1 |
DEVICE FOR DETECTING AND CORRECTING STORAGE ERRORS | 0 |
|
SU1377918A1 |
FAULT-TOLERANT PROCESSOR WITH ERROR CORRECTION IN A BYTE OF INFORMATION | 2021 |
|
RU2758065C1 |
Authors
Dates
2010-05-20—Published
2008-06-02—Filed