FIELD: information technology.
SUBSTANCE: translation of an address, which is carried out inside a processor, is improved by identifying an address which causes crossing of the boundary between different pages in memory and linking address translation information associated with both memory pages. According to one version of the processor, the processor has a circuit adapted to recognise access to a memory area which crosses the page boundary between first and second memory pages. The circuit is also adapted to link address translation information associated with the first and second memory pages. Thus, in response to subsequent access to the same memory area, address translation information associated with the first and second memory pages is retrieved based on single address translation.
EFFECT: accessing data in a process, while preventing execution of multiple translations of virtual addresses in the processor.
21 cl, 5 dwg
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Authors
Dates
2012-09-20—Published
2008-02-07—Filed