FIELD: radio engineering, communication.
SUBSTANCE: invention is meant for generating a video signal of an image of objects from a photoelectric CMOS matrix with digital pixels (Digital Pixel Sensor, DPS). The apparatus has a pixel array 1, a first address register 2, a first address decoder 5, a first clock signal bus, as well as a second 3 and a third 4 address register, a second 6 and a third 7 address decoder, a second and a third clock signal bus, and from a first to a third output data bus. Off bits of the three address registers are connected to the corresponding digital pixel reset buses; the first to the m-th bits are connected to the corresponding pixel threshold buses; (m+1)-th to the k-th bits are connected to the corresponding inputs of an address comparator circuit 8 and the corresponding three address decoders. The clock signal buses are connected to corresponding inputs of the pixel array, the output data buses are connected to corresponding pixel outputs, and the first and second outputs of the address comparator circuit, which correspond to the enable signals of the first and second addresses, are connected to corresponding pixel array buses.
EFFECT: possibility of capturing video information simultaneously from different areas of the photosensor with different modes of accumulation of light flux on said areas with different contrast illumination of the objects.
3 cl, 4 dwg
Title | Year | Author | Number |
---|---|---|---|
METHOD AND DEVICE FOR DIGITAL SUBTRACTION ANGYOGRAPHY | 1992 |
|
RU2043073C1 |
BROADCASTING SIGNAL ENCODING-DECODING DEVICE | 0 |
|
SU1711331A1 |
DEVICE FOR DISPLAYING INFORMATION | 0 |
|
SU1501135A1 |
DEVICE TO GENERATE AND VERIFY ELECTRONIC IMAGE CERTIFIED WITH DIGITAL WATER MARK | 2009 |
|
RU2411579C1 |
VIDEO DATA PROCESSOR | 0 |
|
SU1640714A1 |
INFORMATION INPUT DEVICE | 0 |
|
SU1536368A1 |
BACKUP COUNTER FOR GENERATING TIME MARKS | 2008 |
|
RU2379829C1 |
READ-ONLY MEMORY | 0 |
|
SU1406637A1 |
DEVICE FOR IMPLEMENTING TWO-DIMENSIONAL FAST FOURIER TRANSFORM | 0 |
|
SU1164730A1 |
COMPUTING SYSTEM BASED ON MATRIX OF PROCESSOR ELEMENTS | 1998 |
|
RU2117326C1 |
Authors
Dates
2013-03-27—Published
2011-10-03—Filed