METHOD OF FACILITATING MULTIPLICATION OF FLOATING-POINT NUMBERS REPRESENTED IN RESIDUE NUMBER SYSTEM Russian patent published in 2013 - IPC G06F7/52 G06F7/72 

FIELD: information technology.

SUBSTANCE: remainder on base p_i of a multiplicant is concurrently recorded in matrix memory elements of the i-th multiplier; the number of units b_i in each column of the i-th matrix is concurrently counted; the binary number b₁ is shifted by one bit to the right and summed with number b₂; the obtained sum b^s ₂ is shifted by one bit to the right and summed with number b₃. Similarly, the obtained sums are shifted and summed with subsequent numbers to obtain a sum b^s _2*m-1, wherein the least significant bit of the number b₁ is the first multiplication bit s₁, the least significant bit of each obtained sum b^s _i is the i-th multiplication bit. The binary number b^s _2*m-1 is shifted, the least significant bit of the obtained number is the (2*m)-th bit of the determined product s_2*m. If s_i is greater than p_i, the obtained product s_i is corrected by successive subtraction of the base p_i from s_i until s_i is less than p_i, otherwise correction is not performed; powers of multipliers are simultaneously summed up and the resultant sum is the power of the determined product.

EFFECT: faster computation.

2 dwg