ADDRESS MULTIPLEXING IN PSEUDO-DUAL PORT MEMORY Russian patent published in 2013 - IPC G11C7/22 

FIELD: information technology.

SUBSTANCE: pseudo-dual port memory address multiplexing system includes a read port address latch designed to hold a read address in response to an external clock signal and a write port address latch designed to hold a write address in response to an external clock signal. The system also includes a control circuit that controls read/write memory access based on monitoring a read operation by transmitting a switch signal, wherein the control circuit has self-timing tracking circuit that initiates generation of the switch signal is response to detected completion of said read operation. The system also includes a multiplexer that switches between a held read address and a held write address in response to a switch signal from the control circuit.

EFFECT: faster memory access.

18 cl, 3 dwg