FIELD: radio engineering, communication.
SUBSTANCE: digital computational synthesiser has a reference generator 1 and a formation and delay unit 2, a first memory register 3, a first counter 4, a code multiplier 5, a digital storage 6, a code converter 7, a digital-to-analogue converter (DAC) 8, a low-pass filter 9, the output of which is the analogue output of the digital computational synthesiser; a second memory register 10, a second counter 11, a third memory register 12, a variable-ratio divider 13; inputs of the first, second and third memory registers are the digital inputs of the digital computational synthesiser.
EFFECT: high rate of adjusting operational frequency.
1 dwg
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Authors
Dates
2013-08-27—Published
2012-07-03—Filed