DEGENERATIVE VOLTAGE STABILISER Russian patent published in 2014 - IPC G05F1/56 

Abstract RU 2523168 C1

FIELD: electricity.

SUBSTANCE: voltage stabiliser includes first and second transistors connected by emitters to a common bus, first and second resistors connected by first outputs to the common bus, third transistor connected by emitter to second output of the first resistor, third resistor connected by first output to connection point of first transistor base and third transistor collector, fourth transistor connected by collector to output terminal, fourth resistor connected by first output connection point of second output of third resistor and fourth transistor emitter, second transistor collector and base connected to second output of fourth resistor, fifth resistor connected by first output to output terminal and by second output to connection point of fourth transistor base and second output of second resistor, fifth and sixth transistors connected by emitters to power bus and by bases to sixth transistor collector, seventh transistor connected by collector to power bus, eighth transistor connected by emitter to output terminal, current source inserted between power bus and connection point of eighth transistor base and first and fifth transistor collectors, sixth resistor inserted between second and third transistor bases, eighth transistor collector connected to sixth transistor collector, seventh transistor base connected to eighth transistor base, seventh transistor emitter connected to output terminal.

EFFECT: output voltage of stable temperature, reduced minimum difference of stabiliser input/output voltage.

4 dwg

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RU 2 523 168 C1

Authors

Barilov Ivan Vasil'Evich

Prokopenko Nikolaj Nikolaevich

Starchenko Evgenij Ivanovich

Dates

2014-07-20Published

2013-04-29Filed