DEGENERATIVE VOLTAGE STABILISER Russian patent published in 2011 - IPC G05F1/56 

Abstract RU 2409830 C1

FIELD: electricity.

SUBSTANCE: device includes the first resistor connected with one of its outputs to output terminal; the second resistor connected with one of its outputs to common bus, the first transmitter connected through emitter to power bus; the second transistor connected through emitter to power bus, and those combined to base and collector to the base of the first transistor; and its base is connected to collector of the first transmitter; the fourth transistor connected through collector to power bus, and through base to collector of the first transistor; the fifth transistor connected through collector to emitter of the fourth transistor, and through base to collector of the third transistor; the sixth transistor connected through collector to power bus, and through base of emitter of the fifth transistor, and through emitter to output terminal, the seventh transistor connected through collector to collector of the first transistor; reference voltage source connected between base of the seventh transistor and common bus; the eighth transistor connected through collector to collector of the third transistor, and through base to connection point of the second outputs of the first and the second resistors; current source connected between connection point of emitters of the seventh and the eighth transistors, and common output of which is connected to power bus; the ninth and the tenth transistors connected through emitters to output terminal, and through combined bases and collector of the ninth transistor to the second output of the third resistor; collector of the tenth transistor is connected to collector of the third transistor.

EFFECT: decreasing instability coefficient as to input voltage.

5 dwg

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RU 2 409 830 C1

Authors

Barilov Ivan Vasil'Evich

Starchenko Evgenij Ivanovich

Dates

2011-01-20Published

2009-12-02Filed