ACTIVE HARDWARE STACK OF THE PROCESSOR Russian patent published in 2014 - IPC G06F13/00 

FIELD: electricity.

SUBSTANCE: hardware stack of the processor with the stack pointer and stack control logic comprises a program counter with tri-state output cascades, which includes additionally at least N of program counters with tri-state output cascades, at that inputs for parallel loading of all program counters are interconnected bit-by-bit, outputs of all program counters are interconnected bit-by-bit, increment inputs of all program counters are interconnected so that at each certain moment of time only one program counter selected by the stack pointer is in active state and may perform its functions independently from other counters.

EFFECT: increasing operational speed of the processor, its efficiency, simplifying its design due to manufacturing of a program counter unit operating as per the stack principle and allowing operations of subroutine jump or interrupt service procedure.

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