FIELD: physics, computer engineering.
SUBSTANCE: invention relates to computer engineering. The process control computer includes: a processor connected by a main line to a storage device and computing devices of an inertial navigation subsystem and an image processing subsystem, a microprogram control unit, an adjustable clock-pulse generator and an adjustable secondary power supply. The process control computer is configured to load, from a control computer into storage devices and computer devices of the inertial navigation and image processing subsystems, arrays of pre-calculated information corresponding to operation of the control system in processed mode. The adjustable clock-pulse generator and secondary power supply are configured to simulate internal failures and changes in operating speed of a real process control computer. The adjustable clock-pulse generator is configured to receive a stop signal from the control panel of the control computer, internal memory and all registers of the devices and units of the process computer become accessible through process connections, from which information is read by the control computer for analysis by an operator.
EFFECT: enabling error search in software without degradation of reliability of the standard process control computer.
8 cl, 9 dwg
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Authors
Dates
2015-09-20—Published
2013-04-09—Filed