PHASEMETER Russian patent published in 2016 - IPC G01R23/02 

FIELD: measuring equipment.

SUBSTANCE: invention can be used in radio engineering and other industries for precision measurement of phase difference of pairs of signals, and its variation in time. Phase meter, which includes: a double-channel heterodyne converter, two analogue-to-digital converters, two signal processing channels, a time-setting device, data collection and processing device; note here, that two inputs of the heterodyne converter are inputs of the device, each of two outlets of heterodyne converter is connected via an appropriate analog-to-digital converter with an input of the corresponding signal processing channel, each signal processing channel is connected via both outputs to inputs of the data collection and processing device, the time-setting device is connected via its output with clock inputs of both analogue-to-digital converters, as well as with clock inputs of both signal processing channels and with the clock input of the data collection and processing device; every data processing channel comprises eight registers, while in every channel the output of the fifth register is connected to the input of the sixth register, the output of the seventh register is connected to the input of the eighth register, the clock input of every signal processing channel is connected to clock inputs of all registers, being different by the fact that every signal processing channel includes a switching center, two subtractors and two adders, while the switching centre input is the input of the signal processing channel, its four outputs are connected with the first four registers, while the outputs of the first and third registers are connected to inputs of the first subtractor, the outputs of the second and fourth registers are connected to inputs of the second subtractor, the outputs of the first and second subtractors are connected to inputs of the fifth and seventh registers, the outputs of the fifth and sixth registers are connected to inputs of the first adder, and outputs of the seventh and eighth registers are connected to inputs of the second adder, and the outputs of the adders are outputs of signal processing channels.

EFFECT: technical result consists in acceleration of operating speed.

1 cl, 3 dwg