MEMORY SYSTEM Russian patent published in 2017 - IPC G06F13/16 G11C7/10 G06F11/07 

FIELD: information technology.

SUBSTANCE: device for use in memory module which is connected to the host memory controller via the bus, comprises memory module controller comprising a hardware for generating a request signal to the host memory controller indicating that the host memory controller can gain access to the memory module, wherein the host controller sends read and write requests via the bus to the memory module for storing data in the memory chips of the memory module, while the request signal has a pulse duration greater than or equal to the minimum pulse duration, where the minimum pulse duration comprises a number of clock cycles needed to ensure that the host memory controller detects the request signal, and where the pulse duration of the request signal indicates at least one function in addition to the request signal in the host memory controller.

EFFECT: providing possibility of signalizing about at least one of a plurality of different functions in a single request signal.

25 cl, 23 dwg