SEMICONDUCTOR MEMORY DEVICE Russian patent published in 2018 - IPC G11C11/16 G11C8/18 

FIELD: physics.

SUBSTANCE: semiconductor memory device capable of performing the first mode with the first delay and the second mode with the second delay, greater than the first delay, contains a block of pads configured to accept external address and command; the first delay circuit configured to delay the address at the time corresponding to the first delay; the second delay circuit including shift registers connected in series and configured to delay the address at the time corresponding to the difference between the first delay and the second delay; and a controller configured to use the first delay circuit and the second delay circuit when executing the second mode, wherein the first mode and the second mode are write operations or read operations, the controller is able to perform one of the first mode and the second mode.

EFFECT: reducing the number of shift registers used for the delay.

12 cl, 32 dwg