METHOD OF TESTING AN ELECTRONIC CIRCUIT FOR FAIL-SAFETY AND STAND FOR ITS IMPLEMENTATION Russian patent published in 2018 - IPC G01R31/28 G06F11/22 

FIELD: safety.

SUBSTANCE: invention relates to reliability tests and to devices for their implementation. Invention provides a method of non-destructive testing for fault-safety, in which the failures of elements are simulated, and the circuit remains operational. Claimed method allows to quickly make changes in the electronic circuit, without its soldering. Claimed method makes it possible to realize and carry out tests for different circuits, using a standard set of unified elements. Stand for testing the electronic circuit is shown in fig. 1. Stand operates as follows. Interconnections of the elements of electronic circuit 2 are specified in the table, which is stored in the memory of switch 1. This table is generated and stored in RAM 3, and is copied rom the RAM into the memory of the switch. Switch 1 connects the elements of electronic circuit 2 to each other over the inputs and outputs. Inputs of the switch receive the signals from the outputs of signal generator 4. Output signals of the electronic circuit through switch 1 are transmitted to the inputs of comparator 7. At the same-name inputs of comparator 7, signals are transmitted from the outputs of trained INS 5 for comparison, as a reference. INS 5 inputs are connected to signal generator 4. INS generates the output signals of the electronic circuit in its operable state. Fault of the electronic circuit elements is simulated by random number generator 6 whose output is connected to the input of switch 1. According to the signal from the output of the random number generator, a memory cell is selected, where the fault signal is stored. Failures "constant 0", "constant 1", "break", "short circuit" are simulated. With failures "constant 0" and "break", a "0" signal is generated at the output of the faulty element, independent of the input signals. With failures "constant 1" and "short circuit", a signal "1" is generated at the output of the faulty element, independent of the input signals. At the outputs of the switch, output signals of the faulty electronic circuit are generated, which are transmitted to the inputs of comparator 7. Comparator compares the output signals of a faulty circuit with a reference, INS 5 output signals. When the signals at the inputs are divergent, comparator 7 generates a failure signal of the electronic circuit, which is transmitted and fixed in recorder 8.

EFFECT: technical result, observed in the implementation of the claimed technical solution, is automated test, reduced test time, detecting failures of the electronic circuit.

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