FIELD: computer equipment.
SUBSTANCE: invention relates to computer engineering. Device includes three data inputs, operation code input, data output, cyclic shift unit for 8, 16, 24 bits, inversion unit, mask masking unit '0×FF', ALU 1, performing operations of adding operands, subtracting operands, logical operations AND, OR, XOR, shifting by 1–7 bits of the first operand, transmission of one of the operands to the output, ALU 2 No. 1 and ALU 2 No. 2, performing operations of addition of operands, logical operations AND, OR, XOR, transfer of the first operand to output.
EFFECT: technical result consists in increase in the device performance in solving discrete mathematics problems.
2 cl, 1 dwg
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Authors
Dates
2019-03-12—Published
2018-06-14—Filed