ARITHMETIC-LOGIC APPARATUS AND A METHOD FOR CONVERTING DATA USING SUCH DEVICE Russian patent published in 2019 - IPC G06F15/76 

Abstract RU 2681702 C1

FIELD: computer equipment.

SUBSTANCE: invention relates to computer engineering. Device includes three data inputs, operation code input, data output, cyclic shift unit for 8, 16, 24 bits, inversion unit, mask masking unit '0×FF', ALU 1, performing operations of adding operands, subtracting operands, logical operations AND, OR, XOR, shifting by 1–7 bits of the first operand, transmission of one of the operands to the output, ALU 2 No. 1 and ALU 2 No. 2, performing operations of addition of operands, logical operations AND, OR, XOR, transfer of the first operand to output.

EFFECT: technical result consists in increase in the device performance in solving discrete mathematics problems.

2 cl, 1 dwg

Similar patents RU2681702C1

Title Year Author Number
DEVICE FOR MAKING ARITHMETICAL AND LOGICAL OPERATIONS WITH WORDS 0
  • Kazantsev Pavel Nikolaevich
  • Kornev Mikhail Dmitrievich
  • Mamaev Zhaugashty
  • Otrokhov Yurij Leonidovich
  • Sokol Yurij Mikhajlovich
  • Yakovlev Vladimir Alekseevich
  • Berezenko Aleksandr Ivanovich
  • Koryagin Lev Nikolaevich
  • Kalinin Sergej Evgenevich
  • Markov Boris Lvovich
  • Suvorov Valerij Aleksandrovich
SU767757A1
OPERATIONAL DEVICE 0
  • Gladshtejn Mikhail Arkadevich
  • Baskakov Vyacheslav Alekseevich
  • Komarov Valerij Mikhajlovich
SU1113805A1
ADDRESSING REGISTERS IN DATA PROCESSING DEVICE 1997
  • Jork Richard
  • Frehnsis Khedli Dzhejms
  • Sajms Dominik
  • Bajlz Stjuart
RU2193228C2
PROCESSOR 0
  • Lopato Georgij Pavlovich
  • Smirnov Gennadij Dmitrievich
  • Chalajdyuk Mikhail Fomich
  • Pykhtin Vadim Yakovlevich
  • Astsaturov Ruben Mikhajlovich
  • Zapolskij Aleksandr Petrovich
  • Podgornov Anatolij Ivanovich
  • Pronin Vladislav Mikhajlovich
  • Shklyar Viktor Borisovich
SU1247884A1
MICROPROGRAMMING COMPUTER PROCESSOR 0
  • Krichevskij Boris Mikhajlovich
  • Lyubarskij Valerij Fedorovich
  • Yakuba Anatolij Aleksandrovich
SU1697082A1
DIGITAL SIGNAL PROCESSORS WITH CONFIGURABLE BINARY MULTIPLIER-ACCUMULATION UNIT AND BINARY ARITHMETIC-LOGICAL UNIT 2005
  • Sikh Dzhilbert S.
  • Khsu De D.
  • Li Vaj-Shin
  • Chehn' Sjujfehn
RU2342694C2
VARIABLE LENGTH DATA PROCESSOR 0
  • Polivoda Evgenij Olegovich
  • Skvortsov Aleksandr Nikolaevich
  • Yarmukhametov Azat Usmanovich
SU1675897A1
MICROPROCESSOR 0
  • Astsaturov Ruben Mikhajlovich
  • Lysikov Boris Grigorevich
  • Shostak Aleksandr Antonovich
SU717772A1
TEST ACTION GENERATOR 0
  • Kadanskij Aleksandr Abramovich
  • Korolev Vladimir Nikolaevich
  • Rukkas Oleg Dmitrievich
  • Sidorenko Vasilij Petrovich
SU1439564A1
COMPUTING SYSTEM 1991
  • Bulavenko Oleg Nikolaevich[Ua]
  • Koval' Valerij Nikolaevich[Ua]
  • Palagin Aleksandr Vasil'Evich[Ua]
  • Rabinovich Zinovij L'Vovich[Ua]
  • Averbukh Anatolij Bazil'Evich[Ua]
  • Balabanov Aleksandr Stepanovich[Ua]
  • Didyk Petr Ivanovich[Ua]
  • Ljubarskij Valerij Fedorovich[Ua]
  • Mushka Vera Mikhajlovna[Ua]
RU2042193C1

RU 2 681 702 C1

Authors

Elizarov Sergej Georgievich

Markov Denis Sergeevich

Sovetov Petr Nikolaevich

Dates

2019-03-12Published

2018-06-14Filed