FIELD: computer equipment.
SUBSTANCE: invention relates to the computer equipment. Fault-tolerant computer uses an algebraic linear code for detecting errors with minimum information and hardware redundancy, which is adapted to control arithmetic and logic operations of the processor. To ensure fault tolerance of the computer, formation of a duplicate channel is performed based on use of results of encoding information and functional redundancy of the processor.
EFFECT: reduction of hardware costs for redundancy due to use of algebraic linear code with minimum redundancy for detection of computer errors.
1 cl, 1 dwg
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