FIELD: information technology.
SUBSTANCE: fault-tolerant processor includes two basic devices: a master node and an operating node. The master node includes an operation code decoder, a clock pulse generator, a control unit, an instruction counter, an address register and a correlation unit. The operating node includes a shift counter, a number register, an accumulator register, an extra register, an extra code register, an adder and a control unit. The technical result is achieved by including a correlation unit for detecting and correcting errors of the processor control memory, as well as by including a control unit which enables to detect and correct errors of the arithmetic logic unit when performing arithmetic and logic operations.
EFFECT: high failure-tolerance of the processor due to detection and correction of errors.
8 cl, 8 dwg
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Authors
Dates
2011-04-27—Published
2009-01-27—Filed