FIELD: pulse engineering.
SUBSTANCE: asymmetric flip-flop contains first and second transistors of one type of conductivity, an additional third transistor of another type of conductivity, which is a dynamic load for the second transistor, power bus and common bus, input and output of the device and six resistors. Economical nature of the asymmetric trigger is provided by the fact that in static modes one of the output transistors is closed and the through-current flowing through them from the power bus to the common bus is close to zero. Speed is provided by the fact that load capacity is recharged through low resistance of open transistor at formation of both front and rear fronts of output pulse. This circumstance provides high steepness of fronts of output pulse, and low resistance of channels of open output transistors provide approximation of levels of output signals to potentials of power bus and common bus.
EFFECT: invention allows increasing operating speed and efficiency of an asymmetric trigger and improving the shape of its output signals.
1 cl, 2 dwg
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Authors
Dates
2021-02-18—Published
2020-09-22—Filed