DATA VALIDATION APPARATUS (VARIANTS) Russian patent published in 2021 - IPC G06F7/02 G06F16/215 

FIELD: data processing.

SUBSTANCE: invention relates to data validation apparatuses. The apparatus is comprised of a processor connected with the memory by means of a bus for receiving and transmitting data; a memory containing machine-readable instructions that, during execution, cause the processor to transmit control instructions to the next sample element selection module, the primary requirement determination module, the expanded requirement generation module, the input data entry module, the module of validation based on the expanded requirements, the validation error output module, and the validation result output module, wherein the memory consists of a random access memory (RAM) and a read only memory (ROM); the next sample element selection module configured to read from the read only memory (ROM) the next element from the reduced requirements for the data structure, as well as the additional requirements corresponding with said element, and configured to transfer the address of the current sample element and the additional requirements corresponding with the current sample element, and configured to transfer the current data sample element to the primary requirement determination module, and configured to transfer a signal about completion of processing of the reduced requirements to the expanded requirement generation module and to the module of validation based on the expanded requirements, wherein the reduced requirements consist of a correct data sample and additional requirements attached to said sample; the primary requirement determination module configured to determine primary requirements for a sample element and to transfer the primary requirements to an expanded requirement generation module wherein the primary requirements are requirements for the data type of the data element; the expanded requirement generation module, configured, based on the received primary requirements, additional requirements and the address of the current sample element, to generate the corresponding expanded requirements, temporarily store them in the RAM thereof, transmit to the next sample element selection module a signal about completion of processing of the current element of the reduced requirements, wherein the expanded requirements constitute input data requirements and can be described in any possible format; wherein, if there are unprocessed sample elements from the reduced requirements, the next sample element selection module continues to work; if all the sample elements of the reduced requirements have been processed, the next sample element selection module sends a signal to the expanded requirement generation module and to the expanded requirement validation module about completion of processing of the reduced requirements, wherein the expanded requirement generation module transfers expanded requirements to the random access memory (RAM), wherein the expanded requirement validation module reaches the state of readiness to receive and validate input data; and the input data entry module configured to receive input data required to be validated and to transmit said data to the expanded requirement validation module reading the expanded requirements from the random access memory (RAM) and using said requirements to validate the input data; wherein, if validation of the input data was successful, then the expanded requirement validation module transmits a signal of successful validation to the validation result output module; if an error occurs during validation of the input data, the expanded requirement validation module transmits a signal about a validation error to the validation error output module.

EFFECT: increasing reliability of data validation.

3 cl, 2 dwg